Struct Hc595Cols 

pub struct Hc595Cols<'peripherals> {
    clk: Output<'peripherals>,
    data: Output<'peripherals>,
    latch: Output<'peripherals>,
    shifter_delay_cycles: u32,
}

Driver for a 74HC595 shift register used to drive keyboard matrix columns.

Controls three GPIO output pins to clock serial data into the shift register and latch it to the parallel outputs, selecting the active matrix column.

Fields

clk: Output<'peripherals>

Clock pin (SHCP / SRCLK), used to shift data on each rising edge.

data: Output<'peripherals>

Serial data pin (DS / SER), used to shift bits into the register.

latch: Output<'peripherals>

Latch pin (STCP / RCLK), used to transfer the shift register to the output register.

shifter_delay_cycles: u32

CPU cycles between shift register pin transitions.

Implementations

impl<'peripherals> Hc595Cols<'peripherals>

pub const fn new( data: Output<'peripherals>, clk: Output<'peripherals>, latch: Output<'peripherals>, shifter_delay_cycles: u32, ) -> Self

Creates a new Hc595Cols instance from the given GPIO output pins.

fn pulse(&mut self)

Pulses the clock pin high then low to advance the shift register by one bit.

pub fn select_col(&mut self, col: usize)

Selects a single column by driving its output low (active-low logic).

All other columns are driven high. The column index is mapped MSB-first, so col = 0 drives bit 15 low.

pub fn unselect_all(&mut self)

Deselects all columns by driving all outputs high (active-low logic).

pub fn write_u16_lsb_first(&mut self, value: u16)

Shifts out 16 bits LSB-first into the shift register, then latches the outputs.

Pulls the latch pin low before shifting and high then low again after all bits have been clocked in, transferring the shift register contents to the parallel outputs.